Front end module

ABSTRACT

A front end module, includes a circuit board; a plurality of electronic components positioned on the circuit board, the electronic components comprising an amplifier configured to amplify a wireless frequency signal, a duplexer and filter configured to filter the wireless frequency signal amplified by the amplifier, and a switch selectively connecting the duplexer and filter with the amplifier; and a heat sink embedded within the circuit board under the amplifier and connected to the amplifier.

CROSS-REFERENCE TO RELATED APPLICATION(S)

This application claims the benefit under 35 USC 119(a) of Korean PatentApplication No. 10-2015-0160007 filed on November 13, 2015, in theKorean Intellectual Property Office, the entire disclosure of which isincorporated herein by reference for all purposes.

BACKGROUND

1. Field

The present disclosure relates to a front end module.

2. Description Of Related Art

In recent years, it has become advantageous for a single terminal to beable to support communications using different communication networks,for example, a global system for mobile communication (GSM) network or along term evolution (LTE) network. Such a terminal, supporting both GSMand LTE communications, may include a front end module connected to anantenna terminal. A general front end module may include a switchingelement connected to an antenna, a duplexer or filter element separatinga desired band of a wireless frequency signal transmitted and receivedby the antenna or passing a specific band, and an amplifier elementamplifying the transmitted wireless frequency signal.

When current is consumed, and thus heat is generated by the elementsincluded in the front end module, the generated heat may not only affectthe elements generating heat, but may also affect even high frequencycharacteristics of other elements disposed in the vicinity of theelements within the same circuit board.

SUMMARY

This Summary is provided to introduce a selection of concepts in asimplified form that are further described below in the DetailedDescription. This Summary is not intended to identify key features oressential features of the claimed subject matter, nor is it intended tobe used as an aid in determining the scope of the claimed subjectmatter.

According to a general aspect, a front end module includes a circuitboard; a plurality of electronic components positioned on the circuitboard, the electronic components including an amplifier configured toamplify a wireless frequency signal, a duplexer and filter configured tofilter the wireless frequency signal amplified by the amplifier, and aswitch selectively connecting the duplexer and filter with theamplifier; and a heat sink embedded within the circuit board under theamplifier and connected to the amplifier.

The amplifier may include an integrated transistor, and wherein the heatsink may be substantially centered under a region in which theintegrated transistor of the amplifier is located.

The amplifier may include a plurality of integrated transistors, and theheat sink may be substantially centered under the region in which anintegrated transistor outputting the amplified wireless frequency signalamong the plurality of transistors is located.

The heat sink may be connected to a ground terminal formed on a lowersurface of the amplifier element by a via.

The ground terminal may be configured as a ground of an integratedtransistor of the amplifier element.

The amplifier may further include a plurality of ground terminals andthe plurality of ground terminals may be formed on the lower surface ofthe amplifier corresponding to a region in which the integratedtransistor is located.

The amplifier may further include a plurality of ground terminals andthe plurality of ground terminals may be formed on the lower surface ofthe amplifier.

A control terminal of the amplifier element may be formed on a surfaceother than the lower surface of the amplifier and may be connected to acircuit pattern on the circuit board by a wire.

The circuit board may further include a build-up laminate including acore layer and an upper build-up layer and a lower build-up layer,respectively positioned on an upper surface and a lower surface of thecore layer.

The heat sink may be retained in a cavity penetrating through the corelayer.

The heat sink may be retained in a cavity penetrating through thebuild-up laminate.

The heat sink may be thicker than the core layer.

The front end module may further include a plurality of upper build-uplayers and a plurality of lower build-up layers, and the heat sink maybe retained in the cavity penetrating through an internal build-up layeradjacent to the core layer.

The heat sink may be positioned to form a space between an inner sidewall of the cavity and the heat sink, and an external build-up layerdisposed outside the internal build-up layer extends to the inner sidewall of the cavity to fill the space.

The heat sink may be formed of one of copper (Cu), aluminum (Al), andinvar.

The front end module may further include a plurality of vias configuredto thermally and electrically couple the amplifier to the heatsinkthrough a portion of the circuit board.

According to another general aspect, a front end module includes acircuit board; an amplifier secured to a surface of the circuit board;and a heat sink embedded within the circuit board under the amplifierand connected to the amplifier.

The front end module may further include a via traversing through thecircuit board, the via configured to thermally couple the amplifier withthe heat sink.

The heat sink may include a longitudinally extending metallic blocktransverse to the circuit board and extending therethrough, the metallicblock having a cross-sectional area, co-planar with the circuit board,substantially the same as the amplifier.

The heat sink may be thermally and electrically coupled to a ground ofthe amplifier.

Other features and aspects will be apparent from the following detaileddescription, the drawings, and the claims.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a perspective view schematically illustrating an example of anelectronic device to which a front end module is applied.

FIG. 2 is a block diagram illustrating an example of the front endmodule.

FIG. 3 is a disposition diagram illustrating a front end moduleaccording to an embodiment.

FIG. 4 is a diagram illustrating an example of an amplifier adopted inan amplification circuit of FIG. 2.

FIG. 5 is a cross-sectional view illustrating a front end moduleaccording to an embodiment.

FIG. 6 is a cross-sectional view illustrating a coupling between thefront end module, according to an embodiment, and a main board.

FIG. 7 is a simulation graph illustrating a temperature change rateaccording to an embodiment.

FIG. 8 is a simulation graph illustrating parasitic inductance in anamplifier according to an embodiment.

Throughout the drawings and the detailed description, the same referencenumerals refer to the same elements. The drawings may not be to scale,and the relative size, proportions, and depiction of elements in thedrawings may be exaggerated for clarity, illustration, and convenience.

DETAILED DESCRIPTION

The following detailed description is provided to assist the reader ingaining a comprehensive understanding of the methods, apparatuses,and/or systems described herein. However, various changes,modifications, and equivalents of the methods, apparatuses, and/orsystems described herein will be apparent after an understanding of thedisclosure of this application. For example, the sequences of operationsdescribed herein are merely examples, and are not limited to those setforth herein, but may be changed as will be apparent after anunderstanding of the disclosure of this application, with the exceptionof operations necessarily occurring in a certain order. Also,descriptions of features that are known in the art may be omitted forincreased clarity and conciseness.

The features described herein may be embodied in different forms, andare not to be construed as being limited to the examples describedherein. Rather, the examples described herein have been provided merelyto illustrate some of the many possible ways of implementing themethods, apparatuses, and/or systems described herein that will beapparent after an understanding of the disclosure of this application.

Embodiments will now be described in detail with reference to theaccompanying drawings.

FIG. 1 is a perspective view schematically illustrating an example of anelectronic device to which a front end module is applied.

The electronic device, according to the embodiment may include a mobilephone, a personal digital assistant, a digital video camera, a digitalstill camera, a network system, a computer, a monitor, a television, avideo game, a smartwatch, or other devices which would be known to thoseskilled in the art.

Referring to FIG. 1, the front end module according to an embodimentincludes a circuit board 10 and a plurality of interconnected electroniccomponents 20.

The circuit board 10, in an embodiment, is a package board on or inwhich the plurality of electronic components 20 are mounted or embedded.The circuit board 10 may be a main board or may be mounted on a mainboard.

The electronic component 20 may be provided in plural, and the pluralityof electronic components 20 are disposed on the circuit board 10, or maybe disposed in the circuit board 10. The plurality of electroniccomponents 20 are electrically connected through circuit patterns on thecircuit board 10 and vias within the circuit board 10. For example, theplurality of electronic components 20 include active elements such as anamplifier, a duplexer, a filter, a switch, and a controller, and passiveelements such as a capacitor, an inductor, and a resistor.

The circuit board 10 and the plurality of electronic components 20 areelectrically connected to each other, and thus serve as the front endmodule, transmitting and receiving a wireless frequency signal to andfrom external communication devices and communication base stations.

The front end module according to an embodiment is configurable forvarious communication networks such as Code Division Multiple Access(CDMA), Global System for Mobile (GSM), General Packet Radio Service(GPRS), Enhanced Data Gsm Environment (EDGE), Universal MobileTelecommunications system (UMTS), Wideband Code Division Multiple Access(WCDMA), Long Term Evolution (LTE), and Wireless Broadband Internet(Wibro), and electronic devices performing wireless communications usingnetworks of extended or altered types of the above-mentioned networks.Any above-mentioned wireless communication network may perform wirelesscommunications based on a multiband scheme using various frequencybands.

FIG. 2 is a block diagram illustrating one example of the front endmodule according to the embodiment.

Referring to FIG. 2, the front end module according to an embodimentincludes an antenna switching circuit 21, a filtering circuit 22, a bandswitching circuit 23, and an amplification circuit 24.

The antenna switching circuit 21 is disposed between an antenna and thefiltering circuit 22, and is configured to selectively connect theantenna and each filter and duplexer of the filtering circuit 22 by aswitching operation at the time of transmitting and receiving thewireless frequency.

The filtering circuit 22 includes at least one duplexer and filter, inwhich at least one duplexer separates a transmitted signal and areceived signal from the wireless frequency signal received by theantenna, and at least one filter passes and removes components of aspecific frequency band from the wireless frequency signal transmittedand received.

Referring to FIG. 2, the filtering circuit 22 includes first to thirdduplexers 22 a, 22 b, and 22 c and first and second filters 22 d and 22e, in which each of the first to third duplexers 22 a, 22 b, and 22 crespectively manipulates wireless frequency signals having differentfrequency bands, and each of the first and second filters 22 d and 22 emanipulates wireless frequency signals that use different communicationnetworks.

For example, the first to third duplexers 22 a, 22 b, and 22 cmanipulates different frequency bands of the LTE communication network,one of the first and second filters 22 d and 22 e manipulate a wirelessfrequency signal that uses the LTE communication network, and the otherof the first and second filters 22 d and 22 e manipulate a wirelessfrequency signal that uses the GSM communication network.

The band switching circuit 23 performs a switching operation, dependingon the frequency band of the wireless frequency signal output from theamplification circuit 24, to select the filter and the duplexercorresponding to the frequency band.

The amplification circuit 24 includes at least one amplifier, in whichat least one amplifier amplifies the wireless frequency signal fortransmission and transfers the amplified wireless frequency signal tothe filter and the duplexer by the band switching circuit 23, or maydirectly transfer the amplified wireless frequency signal to the filter.

Referring to FIG. 2, the amplification circuit 24 includes first andsecond amplifiers 24 a and 24 b, in which the first and secondamplifiers 24 a and 24 b are configured to amplify the wirelessfrequency signals that use different communication networks. Forexample, one of the first and second amplifiers 24 a and 24 b amplifiesthe wireless frequency signal that is transmitted on the LTEcommunication network and the other of the first and second amplifiers24 a and 24 b amplifies the wireless frequency signal that istransmitted on the GSM communication network.

FIG. 3 is a disposition diagram illustrating one example of the frontend module.

Referring to FIG. 3, the plurality of electronic components are disposedon the circuit board 10. In detail, the plurality of interconnectedelectronic components include one or more duplexers DPX1, DPX2, andDPX3, one of more filters FT1 and FT2, one or more amplifier PA1 andPA2, one or more switches SW1 and SW2, one or more capacitors C1 and C2,one or more inductors L1 and L2, and one or more resistors R1 and R2,and may further include a controller CTRL to control active elementssuch as the one or more duplexers DPX1, DPX2, and DPX3, the one or morefilters FT1 and FT2, the one or more amplifier PA1 and PA2, and the oneor more switches SW1 and SW2.

The one or more duplexers DPX1, DPX2, and DPX3, the one or more filtersFT1 and FT2, the one or more amplifiers PA1 and PA2, and the one or moreswitches SW1 and SW2, the one or more capacitors C1 and C2, the one ormore inductors L1 and L2, the one or more resistors R1 and R2, and thecontroller CTRL, are electrically connected by the circuit patterns onthe circuit board 10 and the vias within the circuit board, and thusserve as the antenna switching circuit 21, the filtering circuit 22, theband switching circuit 23, and the amplification circuit 24, illustratedin FIG. 2.

The one or more duplexers DPX1, DPX2, and DPX3 and the one or morefilters FT1 and FT2 of FIG. 3 are interconnected and configured as afiltering circuit, such as the filtering circuit 22 of FIG. 2, and theone or more switches SW1 and SW2 of FIG. 3 are interconnected andconfigured as an antenna switching circuit and a band switching circuit,such as the antenna switching circuit 21 and the band switching circuit23 of FIG. 2. Further, the one or more amplifiers PA1 and PA2 areinterconnected and configured as an amplification circuit, such as theamplification circuit 24 of FIG. 2.

The active elements such as the one or more duplexers DPX1, DPX2, andDPX3, the one or more filters FT1 and FT2, and the one or moreamplifiers PA1 and PA2 generate heat parasitically in response to, or asa byproduct of, current consumption. Problematically, the generated heatmay not only negatively affect high frequency characteristics of theactive elements generating heat, but may also affect even high frequencycharacteristics of other active or passive elements disposed in thevicinity of the active elements within the same circuit board. Inparticular, the problem may be more serious in the amplifiers PA1 andPA2, emitting a considerable portion of consumed power, for example,about 40 to 70% of consumed power, in the form of waste heat.

FIG. 4 is a diagram illustrating one example of an amplifier adopted inan amplification circuit, such as the one illustrated in FIG. 2. Theamplifier may be implemented by any one amplifier PA of the one or moreamplifiers PA1 and PA2 of FIG. 3.

The amplifier PA is, according to an embodiment, an integrated circuit(IC) in which transistors HBT1, HBT2, and HBT3, a plurality of resistorsR, a plurality of capacitors C, an inductor L, and a diode D areintegrated. The amplifier PA includes a plurality of driving voltageterminals VCC1 and VCC2, bias terminals I_DA, I_LPM, and I_LP, a signalinput terminal RF in, a signal output terminal RF out, and one or moreground terminals GND1 and GND2. The driving voltage terminals VCC1 andVCC2, the bias terminals I_DA, I_LPM, and I_LP, the signal inputterminal RF in, and the signal output terminal RF out may beindividually, or collectively, termed a control terminal.

According to an embodiment, a signal is applied to the plurality ofdriving voltage terminals VCC1 and VCC2 and the bias terminals I_DA,I_LPM, and I_LP of the amplifier element PA by the resistors and thecapacitors, where the capacitors and resistors respectively correspondto capacitors C1 and C2 and resistors R1 and R2 of FIG. 3.

Referring to FIG. 4, the wireless frequency signal input through thesignal input terminal RF in is primarily amplified through the firsttransistor HBT1, may be amplified by the second and third transistorsHBT2 and HBT3 to have a final output size, and then may be output to thesignal output terminal RF out.

In this case, the first transistor HBT1, performing the primaryamplification, is configured as a drive amplifier, and the second andthird transistors HBT2 and HBT3, performing the secondary amplification,are configured as power amplifiers.

The embodiment of FIG. 4 illustrates that transistors corresponding tothe drive amplifier and the power amplifier(s) are provided eithersingly or in pairs, but the number of transistors configuring the driveamplifier and the power amplifier may be changed.

Referring to FIG. 4, because a voltage or current level of the drivingvoltage terminal VCC2 and the bias terminals I_LPM and I_LP of the poweramplifier that outputs the final wireless frequency signal is higherthan that of the driving voltage terminal VCC1 and the bias terminalI_DA of the drive amplifier, most heat is generated by the second andthird transistors HBT2 and HBT3 during the amplification of the wirelessfrequency signal.

In the front end module according to one or more embodiments, a heatsink connected to the second and third transistors HBT2 and HBT3 isprovided in the circuit board to efficiently dissipate heat generated bythe second and third transistors HBT2 and HBT3.

The heat sink is, for example, disposed in a lower portion of the boardin the mounting direction of the amplifier element in which the secondand third transistors HBT2 and HBT3 are integrated, to thereby minimizea transfer path of heat. In other words, the heat sink is, for example,positioned to correspond with the second and third transistors HBT2 andHBT3. According to one or more embodiments, the heat sink correspondswith both X and Y coordinates of the transistors, but may be positionedinside the circuit board 10, or on an inverse, obverse, or opposing faceof the circuit board 10. The heat sink absorbs the heat generated by thesecond and third transistors HBT2 and HBT3 through vias, to pass throughthe circuit board 10, and may distribute the absorbed heat to otherpaths connected to the heat sink. For example, the heat sink isconnected to the circuit patterns on the main board on which the circuitboard is mounted, to dissipate the absorbed heat.

The heat sink, according to an embodiment, is connected to the groundterminals GND1 and GND2 of the amplifier element PA by the vias. Inparticular, the heat sink is connected to the ground terminals GND2 ofthe second and third transistors HBT2 and HBT3, which are a cause ofheat generation, by the plurality of vias.

The ground terminals GND2 of the second and third transistors HBT2 andHBT3, according to an embodiment, are provided in plural, and theplurality of ground terminals GND2 are formed over a lower surface ofthe amplifier element PA or formed on the lower surface of the amplifierelement corresponding to a region in which the integrated second andthird transistors HBT2 and HBT3 are disposed, and thus may be connectedto the heat sink by the vias.

To maintain the voltage of the ground terminals GND1 and GND2 as aground voltage, the heat sink is connected, for example, to a groundconductive pattern on the main board on which the circuit board ismounted.

According to an embodiment, the heat sink, having a sufficient volumeaccording to the expected heat generation and the environment, isconnected to the ground conductive pattern on the main board to improveground characteristics, to thereby remove parasitic components that maybe caused between emitter terminals of the second and third transistorsHBT2 and HBT3 and the ground, and to improve an amplification gain ofthe amplifier element.

FIG. 5 is a cross-sectional view illustrating a front end moduleaccording to an embodiment, and FIG. 6 is a cross-sectional viewillustrating a coupling between the front end module and a main board.

Referring to FIG. 5, a circuit board 100 according to an embodimentincludes a core layer 110, an upper first build-up layer 121 a and anupper second build-up layer 122 a that are disposed on an upper surfaceof the core layer 110, and a lower first build-up layer 121 b and alower second build-up layer 122 b that are disposed on a lower surfaceof the core layer 110.

A structure including the core layer 110, the upper first and secondbuild-up layers 121 a and 122 a, and the lower first and second build-uplayers 121 b and 122 b that are used in the circuit board 100, aretermed a build-up laminate. Further, the upper first build-up layer 121a and the lower first build-up layer 121 b that are adjacently disposedto the core layer 110 are collectively termed an internal build-uplayer, and the upper second build-up layer 122 a and the lower secondbuild-up layer 122 b, that are disposed outside the internal build-uplayer, are collectively termed an external build-up layer.

The core layer 110, according to an embodiment, has a conductive patternp0 disposed on the upper surface and P0 disposed on the lower surface ofthe core layer 110 and an inner-layer circuit including a conductive viav0 penetrating through the core layer 110 and providing electrical andthermal conduction between the upper and lower surfaces thereof. Thecore layer 110 is formed of a material having high rigidity, in order toprevent the circuit board 100 from becoming warped.

For example, the core layer 110 is formed of an insulating resin inwhich a reinforcing material such as prepreg, glass, or a metal likeinvar is impregnated. The reinforcing material may be a glass fiber or ametal material and the insulating resin may be a resin like bismaleimidetriazine or epoxy. When the core layer 110 is formed of metal, a surfaceon which the inner-layer circuit will be formed may be coated with aninsulating material.

The upper first build-up layer 121 a and the lower first build-up layer121 b include an outer-layer circuit including a conductive pattern p1and P1, respectively, and corresponding conductive vias V1, and theupper second build-up layer 122 a and the lower second build-up layer122 b include an outer-layer circuit including a conductive pattern p2and P2, respectively and corresponding conductive vias V2.

The upper first and second build-up layers 121 a and 122 a and the lowerfirst and second build-up layers 121 b and 122 b are formed, forexample, of an insulating material to electrically insulate betweencircuits. For example, the insulating material includes a thermosettingresin like epoxy resin or a thermoplastic resin like polyimide. In aspecific example, the upper first and second build-up layers 121 a and122 a and the lower first and second build-up layers 121 b and 122 b arealso formed of a photo-curable insulating resin, such as aphotosensitive insulating film.

The conductive patterns p0, P0, p1, P1, p2, and P2 and/or the conductivevias v0, v1, and v2 include, for example, any one or any combination oftwo or more of: copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold(Au), nickel (Ni), lead (Pd), or an alloy thereof. In a specificexample, the conductive patterns p0, P0, p1, P1, and p2 are formed froma copper (Cu) foil.

A cavity C, according to an embodiment, penetrates through the build-uplaminate and an inside of the cavity C is provided with a heat sink 130.The heat sink 130 is formed of a material having excellent thermalconductivity. For example, the heat sink 130 is formed of copper (Cu),aluminum (Al), or invar and may be illustrated as a rectangularparallelepiped block, but may also be disposed in various other shapes.

The cavity C for disposing the heat sink 130, according to one or moreembodiments, penetrates through a portion of the build-up laminate. Asan example, the cavity C penetrates through the core layer 110, and, asanother example, the cavity C penetrates through the upper firstbuild-up layer 121 a and the lower first build-up layer 121 b, as wellas through the core layer 110. When the cavity C penetrates through theupper first build-up layer 121 a and the lower first build-up layer 121b, as well as the core layer 110, the heat sink 130 may at least have athickness t1, larger than that of the core layer 110.

As illustrated in FIG. 5, the thickness t1 of the heat sink 130substantially corresponds to a depth of the cavity C. By doing so, theheat sink 130 has a sufficient volume (and surface area) to improve heatdissipation characteristics.

The heat sink 130 disposed in the cavity C, according to one or moreembodiments, is supported in the cavity C by a formation material of theupper second build-up layer 122 a and the lower second build-up layer122 b, which are located at an outermost position. In other words, theheat sink 130 is sandwiched between the upper and lower second build-uplayers 122 a and 122 b, respectively.

A width w1 of the heat sink 130 is designed to be smaller than that ofthe cavity C, and thus the heat sink is disposed at a predeterminedinterval d1 from an inner side wall of the cavity C. The upper secondbuild-up layer 122 a and the lower second build-up layer 122 b,according to one or more embodiments, extend to be filled in a spacebetween the inner side wall of the cavity C and the heat sink 130, tofirmly fix the heat sink 130 in the cavity C.

The upper second build-up layer 122 a and the lower second build-uplayer 122 b that are located at the outermost portion, according to oneor more embodiments, include one or more vias, e.g. V_(H) for heatdissipation. One or more of the vias, V_(H), for heat dissipation aredirectly connected to the heat sink 130 and are connected to aconductive pattern p2 and/or P2, exposed on one or more of the surfacesof the circuit board 100.

The upper and lower surfaces of the heat sink 130, according to one ormore embodiments, are each connected to a plurality of vias V_(H) forheat dissipation. The plurality of vias V_(H) for heat dissipationconnected to the upper surface of the heat sink 130 contact anelectronic component 200 mounted on one surface of the circuit board 100through the conductive pattern p2 and a solder S, and the plurality ofvias V_(H) for heat dissipation connected to the lower surface of theheat sink 130 contact a main board 300 on which the circuit board 100 ismounted through the conductive pattern P2 and the solder S. The heatsink 130 is located within the board adjacent to the electroniccomponent 200 to quickly absorb heat generated by the electroniccomponent 200 and to dissipate the absorbed heat through the main board300, which is connected to the heat sink.

A circuit pattern MP formed on a base substrate MB of the main board300, connected to the heat sink 130, according to one or moreembodiments, is a ground conductive pattern. When the heat sink 130,having a sufficient volume, is connected to the ground conductivepattern MP of the main board 300, ground characteristics may beimproved. By doing so, the parasitic component, which may appear betweenthe emitter terminal of the transistor integrated in the amplifier PAand the ground, is removed, and the amplification gain of the amplifierelement PA is improved.

The circuit board 100, according to one or more embodiments, includes anouter layer 140. The outer layer 140 includes first and second outerlayers 140 a and 140 b, each disposed on the surfaces of the uppersecond build-up layer 122 a and the lower second build-up layer 122 b,respectively, which are located at the outermost portion. The outerlayer 140 is, for example, a solder resist layer. The outer layer 140has a plurality of openings o through which a region to be connected toan external circuit or electronic components (not illustrated) among theconductive patterns p2 and/or P2, located at the outermost portion, isexposed. The conductive pattern p2 and/or P2, connected to the via,V_(H), for heat dissipation may be exposed to the surface of the circuitboard 100 through a portion of the plurality of openings o.

The above-mentioned embodiment illustrates that two build-up layers areformed on each surface of the core layer 100, but one build up layer orthree or more build-up layers may be formed, and therefore the cavitystructure may be variously changed as would be apparent to one of skillin the art after gaining a thorough understanding of the instantdisclosure.

FIGS. 5 and 6 schematically illustrate one electronic component 200mounted on the circuit board 100. In addition, as illustrated in FIG. 3,a plurality of electronic components may also be mounted on the circuitboard.

However, the heat sink 130 may be provided in a portion of the space inthe circuit board 100, and the electronic component 200 disposed overthe heat sink 130 may be an electronic component having a high heatgeneration value among the plurality of electronic components. Forexample, the electronic component 200, mounted over the heat sink 130,may be one or more amplifiers PA1 and PA2 of FIG. 3. The plurality ofheat sinks 130 formed in the circuit board 100 are, for example,disposed under one or more amplifiers PA1 and PA2, respectively.

Hereinafter, for convenience of explanation, an embodiment will bedescribed in the case where the electronic component disposed over theheat sink 130 is the amplifier element PA. However, such a descriptionis merely an example, and the description is not limited thereto.

Heat is likely to be generated by the operation of the amplifier elementPA. The amplifier element PA may generate relatively more heat than isgenerated in other regions, and therefore the amplifier element PA mayhave a high temperature region, i.e., a hot spot. The hot spot may beformed at one point or at a plurality of points of the amplifier elementPA. In particular, the hot spot may be formed in a region in whichswitches of the amplifier element PA are relatively dense. Morespecifically, referring to FIG. 4, in the amplifier element PA, aportion in which the integrated second and third transistors outputtingthe amplified wireless frequency signal are located represent a hot spotregion.

According to an embodiment, the hot spot of the amplifier element PA issubstantially centered over the heat sink 130. Therefore, the heat sink130 acts to effectively receive the heat generated by the hot spot.

According to an embodiment, substantially all of the area of theamplifier element PA, as well as the hot spot of the amplifier elementPA, may be positioned or centered over the heat sink 130. To effectivelycapture and transmit this waste heat, the area of the heat sink 130,according to one or more embodiments, is equal to or greater than thatof the amplifier element PA, positioned over the heat sink 130. Forexample, an area of the upper surface of the heat sink 130 is about 1.0mm×0.9 mm, and an area of the amplifier element PA is about 1.0 mm×0.8mm or about 1.0 mm×0.9 mm. In this case, the amplifier element PA havingan area equal to or smaller than that of the heat sink 130 is disposedin a region of the upper surface of the heat sink 130, and thus,substantially all of the heat generated by the amplifier element PA isquickly transferred to the heat sink 130.

As described above, the heat sink 130 is connected to the groundterminals GND1 and GND2 of the amplifier element PA, illustrated in FIG.3, through the vias. In particular, the heat sink 130 is connected tothe plurality of ground terminals GND2 of the second and thirdtransistors HBT2 and HBT3, which are a substantial cause of heatgeneration, by the plurality of vias V_(H).

When the plurality of ground terminals GND2 are formed over the lowersurface of the amplifier PA, the driving voltage terminals VCC1 andVCC2, the bias terminals I_DA, I_LPM, and I_DA, and the signalinput/output terminals RF in and RF out(which correspond to the controlterminal of the amplifier PA) are formed on a portion other than thelower surface of the amplifier PA and instead, are formed, for example,on the upper surface of the amplifier PA. In other words, the controlterminals are formed on an opposing surface of the amplifier PA than theground terminals. As another example, the control terminals may beformed on lateral surfaces of the amplifier PA. The driving voltageterminals VCC1 and VCC2, the bias terminals I_DA, I_LPM, and I_LP, andthe signal input/output terminals RF in and RF out that are formed onthe upper surface of the amplifier element PA, according to one or moreembodiments, are connected to the conductive pattern p2 on the circuitboard 100 by a wire w.

FIG. 7 is a simulation graph illustrating a temperature change rate,according to an embodiment, and FIG. 8 is a simulation graphillustrating parasitic inductance in the amplifier element, according toan embodiment.

In FIGS. 7 and 8, Case A is a graph illustrating a temperature changerate at the electronic component 200 when, instead of the heat sinkaccording to an embodiment, vias are disposed at a low density, Case Bis a graph illustrating a temperature change rate when, instead of theheat sink according to an embodiment, vias are disposed at a highdensity, and Case C is a graph illustrating a temperature change ratewhen the heat sink, according to an embodiment, is employed.

Case A is a graph of the case in which 48 vias, having a diameter ofabout 65 μm, are disposed on an area of 1.4 mm×1.0 mm at a pitchinterval of about 165 μm, Case B is a graph of the case in which 88vias, having a diameter of about 65 μm, are disposed on an area of 1.4mm×1.0 mm at a pitch interval of about 125 μm, instead of the heat sink,according to an embodiment, and Case C is a graph of the case in whichthe heat sink, according to an embodiment, is disposed on an area of 1.4mm×1.0 mm.

Referring to FIG. 7, it may be appreciated that the temperature changerate of Case A is about 0%, and thus very little heat generated by theelectronic components is emitted when the vias are disposed at a lowdensity, while the temperature change rate of Case B is about 1.2% Thus,the heat generated by the electronic components is transferred inrelatively small amounts in the case that the vias are disposed at arelatively high density.

On the other hand, the temperature change rate of Case C, according toone or more embodiments, in which the heat sink having a sufficientvolume and surface area quickly absorbs the heat generated by theelectronic components, is about −5.7%. As a result, it may beappreciated that the heat generated by the electronic components is moreeffectively transferred in this embodiment, compared with Cases A and B,in which the vias are disposed at a low density or even a high density.

Referring to FIG. 8, the parasitic inductance may correspond to theparasitic component generated between the emitter terminals of thesecond and third transistors HBT2 and HBT3 described with reference toFIG. 4 and the ground.

In FIG. 8, the parasitic inductance near 2.0 GHz of Case A is 2.4*10⁻¹¹[H], the parasitic inductance near 2.0 GHz of Case B is 1.75*10⁻¹¹ [H],and thus the parasitic inductance component may be relatively high, butthe parasitic inductance near 2.0 GHz of Case C in which the heat sinkhaving a sufficient volume is connected to the ground conductive patternto improve the ground characteristics is 5.0*10⁻¹² [H]. As a result, itmay be appreciated that the parasitic inductance component is remarkablyreduced, compared with Cases A and B.

The following Table 1 shows the amplification gain according to anembodiment.

TABLE 1 Frequency (MHz) Gain (dB) Case A 1920 32.35 1950 32.08 198031.67 Case B 1920 32.5 1950 32.34 1980 32.06 Case C 1920 33.35 195033.43 1980 33.39

Referring to the above Table 1, Case A has an amplification gain of32.35 dB at a frequency 1920 MHz, Case B has an amplification gain of32.5 dB at a frequency 1920 MHz, and Case C has an amplification gain of33.35 dB at a frequency 1920 MHz. Further, Case A has an amplificationgain of 32.08 dB at a frequency 1950 MHz, Case B has an amplificationgain of 32.34 dB at a frequency 1950 MHz, and Case C has anamplification gain of 33.43 dB at a frequency 1950 MHz. Further, Case Ahas an amplification gain of 31.67 dB at a frequency 1980 MHz, Case Bhas an amplification gain of 32.06 dB at a frequency 1980 MHz, and CaseC has an amplification gain of 33.39 dB at a frequency 1980 MHz. Thatis, it may be appreciated that Case C increases the amplification gainof the amplifier element in response to the reduction in the parasiticinductance component, compared with Cases A and B.

As set forth above, according to one or more embodiments, it is possibleto improve the high frequency and thermal transfer characteristics ofthe front end module using the heat sink having sufficient volume as theground.

Throughout the specification, when an element, such as a layer, region,or substrate, is described as being “on,” “connected to,” or “coupledto” another element, it may be directly “on,” “connected to,” or“coupled to” the other element, or there may be one or more otherelements intervening therebetween. In contrast, when an element isdescribed as being “directly on,” “directly connected to,” or “directlycoupled to” another element, there can be no other elements interveningtherebetween.

As used herein, the term “and/or” includes any one and any combinationof any two or more of the associated listed items.

Although terms such as “first,” “second,” and “third” may be used hereinto describe various members, components, regions, layers, or sections,these members, components, regions, layers, or sections are not to belimited by these terms. Rather, these terms are only used to distinguishone member, component, region, layer, or section from another member,component, region, layer, or section. Thus, a first member, component,region, layer, or section referred to in examples described herein mayalso be referred to as a second member, component, region, layer, orsection without departing from the teachings of the examples.

Spatially relative terms such as “above,” “upper,” “below,” and “lower”may be used herein for ease of description to describe one element'srelationship to another element as shown in the figures. Such spatiallyrelative terms are intended to encompass different orientations of thedevice in use or operation in addition to the orientation depicted inthe figures. For example, if the device in the figures is turned over,an element described as being “above” or “upper” relative to anotherelement will then be “below” or “lower” relative to the other element.Thus, the term “above” encompasses both the above and below orientationsdepending on the spatial orientation of the device. The device may alsobe oriented in other ways (for example, rotated 90 degrees or at otherorientations), and the spatially relative terms used herein are to beinterpreted accordingly.

The terminology used herein is for describing various examples only, andis not to be used to limit the disclosure. The articles “a,” “an,” and“the” are intended to include the plural forms as well, unless thecontext clearly indicates otherwise. The terms “comprises,” “includes,”and “has” specify the presence of stated features, numbers, operations,members, elements, and/or combinations thereof, but do not preclude thepresence or addition of one or more other features, numbers, operations,members, elements, and/or combinations thereof.

Due to manufacturing techniques and/or tolerances, variations of theshapes shown in the drawings may occur. Thus, the examples describedherein are not limited to the specific shapes shown in the drawings, butinclude changes in shape that occur during manufacturing.

The features of the examples described herein may be combined in variousways as will be apparent after an understanding of the disclosure ofthis application. Further, although the examples described herein have avariety of configurations, other configurations are possible as will beapparent after an understanding of the disclosure of this application.

While this disclosure includes specific examples, it will be apparentafter an understanding of the disclosure of this application thatvarious changes in form and details may be made in these exampleswithout departing from the spirit and scope of the claims and theirequivalents. The examples described herein are to be considered in adescriptive sense only, and not for purposes of limitation. Descriptionsof features or aspects in each example are to be considered as beingapplicable to similar features or aspects in other examples. Suitableresults may be achieved if the described techniques are performed in adifferent order, and/or if components in a described system,architecture, device, or circuit are combined in a different manner,and/or replaced or supplemented by other components or theirequivalents. Therefore, the scope of the disclosure is defined not bythe detailed description, but by the claims and their equivalents, andall variations within the scope of the claims and their equivalents areto be construed as being included in the disclosure.

What is claimed is:
 1. A front end module, comprising: a circuit board;electronic components positioned on the circuit board and comprising anamplifier configured to amplify a wireless frequency signal, a duplexerand filter configured to filter the amplified wireless frequency signal,and a switch selectively connecting the duplexer and filter with theamplifier; and a heat sink embedded within the circuit board, disposedunder and connected to the amplifier.
 2. The front end module of claim1, wherein the amplifier comprises an integrated transistor, and theheat sink is disposed under a region in which the integrated transistorof the amplifier is located.
 3. The front end module of claim 2, whereinthe amplifier comprises integrated transistors, and the heat sink isdisposed under the region in which an integrated transistor outputtingthe amplified wireless frequency signal among the integrated transistorsis located.
 4. The front end module of claim 1, wherein the heat sink isconnected to a ground terminal formed on a lower surface of theamplifier by a via.
 5. The front end module of claim 4, wherein theground terminal is configured as a ground of an integrated transistor ofthe amplifier.
 6. The front end module of claim 5, wherein the amplifierfurther comprises ground terminals formed on the lower surface of theamplifier and corresponding to a region in which the integratedtransistor is located.
 7. The front end module of claim 5, wherein theamplifier further comprises a plurality of ground terminals and theplurality of ground terminals are formed on the lower surface of theamplifier.
 8. The front end module of claim 7, wherein a controlterminal of the amplifier is formed on a surface other than the lowersurface of the amplifier and is connected to a circuit pattern on thecircuit board by a wire.
 9. The front end module of claim 1, wherein thecircuit board further comprises a build-up laminate comprising a corelayer and an upper build-up layer and a lower build-up layer,respectively positioned on an upper surface and a lower surface of thecore layer.
 10. The front end module of claim 9, wherein the heat sinkis retained in a cavity penetrating through the core layer.
 11. Thefront end module of claim 9, wherein the heat sink is retained in acavity penetrating through the build-up laminate.
 12. The front endmodule of claim 11, wherein the heat sink is thicker than the corelayer.
 13. The front end module of claim 11, further comprising: upperbuild-up layers and lower build-up layers, wherein the heat sink isretained in the cavity penetrating through an internal build-up layeradjacent to the core layer.
 14. The front end module of claim 13,wherein the heat sink is positioned to form a space between an innerside wall of the cavity and the heat sink, and an external build-uplayer disposed outside the internal build-up layer extends to the innerside wall of the cavity to fill the space.
 15. The front end module ofclaim 1, wherein the heat sink is formed of one of copper (Cu), aluminum(Al), and invar.
 16. The front end module of claim 1, furthercomprising: a plurality of vias configured to thermally and electricallycouple the amplifier to the heatsink through a portion of the circuitboard.
 17. A front end module, comprising: a circuit board; an amplifiersecured to a surface of the circuit board; and a heat sink embeddedwithin the circuit board under the amplifier and connected to theamplifier.
 18. The front end module of claim 17, further comprising: avia traversing through the circuit board, the via configured tothermally couple the amplifier with the heat sink.
 19. The front endmodule of claim 17, wherein the heat sink comprises a longitudinallyextending metallic block transverse to the circuit board and extendingtherethrough, the metallic block having a cross-sectional area,co-planar with the circuit board, substantially the same as theamplifier.
 20. The front end module of claim 17, wherein the heat sinkis thermally and electrically coupled to a ground of the amplifier.